Searched refs:ppll_div_3 (Results 1 – 2 of 2) sorted by relevance
216 (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & in radeon_write_pll_regs()265 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); in radeon_write_pll_regs()266 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()344 mode->ppll_div_3 = 0x00030059; in radeon_setmode()397 mode->ppll_div_3 = 0x00010078; in radeon_setmode_9200()400 mode->ppll_div_3 = 0x00010060; in radeon_setmode_9200()428 mode->ppll_div_3 = 0x0002008c; in radeon_setmode_9200()434 mode->ppll_div_3 = 0x00020074; in radeon_setmode_9200()459 mode->ppll_div_3 = 0x000300b0; in radeon_setmode_9200()464 mode->ppll_div_3 = 0x0003008e; in radeon_setmode_9200()[all …]
227 u32 ppll_div_3; member