Home
last modified time | relevance | path

Searched refs:phase0 (Results 1 – 1 of 1) sorted by relevance

/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_training_static.c214 u32 phase0, phase1, max_phase; in ddr3_tip_read_leveling_static_config() local
273 phase0 = (total_round_trip_delay_arr[bus_index] - in ddr3_tip_read_leveling_static_config()
277 max_phase = (phase0 > phase1) ? phase0 : phase1; in ddr3_tip_read_leveling_static_config()
281 phase0, phase1, max_phase)); in ddr3_tip_read_leveling_static_config()
286 (ddr_period * phase0)) / adll_period); in ddr3_tip_read_leveling_static_config()
305 data0 = ((phase0 << 6) + (adll0 & 0x1f)); in ddr3_tip_read_leveling_static_config()