Home
last modified time | relevance | path

Searched refs:p3 (Results 1 – 7 of 7) sorted by relevance

/rk3399_rockchip-uboot/board/nokia/rx51/
H A Dtag_omap.h241 #define OMAP_TAG_LCD_CONFIG(p1, p2, p3, p4) \ argument
246 .u.lcd.nreset_gpio = p3, \
250 #define OMAP_TAG_GPIO_SWITCH_CONFIG(p1, p2, p3, p4, p5) \ argument
256 .u.gpio_switch.flags = p3, \
261 #define OMAP_TAG_WLAN_CX3110X_CONFIG(p1, p2, p3, p4, p5) \ argument
267 .u.wlan_cx3110x.power_gpio = p3, \
272 #define OMAP_TAG_PARTITION_CONFIG(p1, p2, p3, p4) \ argument
278 .u.partition.offset = p3, \
/rk3399_rockchip-uboot/include/optee_include/
H A Dtee_client_api.h199 #define TEEC_PARAM_TYPES(p0, p1, p2, p3) \ argument
200 ((p0) | ((p1) << 4) | ((p2) << 8) | ((p3) << 12))
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap3/
H A Dclock.c125 int xip_safe, p0, p1, p2, p3; in dpll3_init_34xx() local
226 p3 = (u32)&prcm_base->idlest_ckgen; in dpll3_init_34xx()
228 (*f_lock_pll) (p0, p1, p2, p3); in dpll3_init_34xx()
382 int xip_safe, p0, p1, p2, p3; in dpll3_init_36xx() local
476 p3 = (u32)&prcm_base->idlest_ckgen; in dpll3_init_36xx()
478 (*f_lock_pll) (p0, p1, p2, p3); in dpll3_init_36xx()
/rk3399_rockchip-uboot/include/power/
H A Dpmic.h61 struct pmic *p2, struct pmic *p3);
/rk3399_rockchip-uboot/lib/
H A Dbch.c236 const uint32_t *pdata, *p0, *p1, *p2, *p3; in encode_bch() local
278 p3 = tab3 + (l+1)*((w >> 24) & 0xff); in encode_bch()
281 r[i] = r[i+1]^p0[i]^p1[i]^p2[i]^p3[i]; in encode_bch()
283 r[l] = p0[l]^p1[l]^p2[l]^p3[l]; in encode_bch()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Ddra71-evm.dts150 * With this PM_SEL(p3) should not matter
/rk3399_rockchip-uboot/common/
H A Dcli_hush.c3594 char *p1, *p2, *p3; local
3599 p3 = insert_var_value(inp[i]);
3600 p1 = p3;
3622 if (p3 != inp[i]) free(p3);