Searched refs:outdiv (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/mips/mach-ath79/ar934x/ |
| H A D | clk.c | 33 u8 outdiv; member
150 (pll_cfg->outdiv << AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT); in ar934x_pll_init()
159 (pll_cfg->outdiv << AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT); in ar934x_pll_init()
231 const u32 outdiv = (regval >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & in ar934x_cpupll_to_hz() local
241 return (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); in ar934x_cpupll_to_hz()
246 const u32 outdiv = (regval >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & in ar934x_ddrpll_to_hz() local
256 return (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); in ar934x_ddrpll_to_hz()
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| /rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/ |
| H A D | lowlevel_init.S | 15 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
19 ((0x7 & outdiv) << 23) )
38 #define MK_PLL_CPU_CONF(frac, nint, ref, outdiv) \ argument
42 PLL_CPU_OUTDIV(outdiv))
48 #define MK_PLL_DDR_CONF(frac, nint, ref, outdiv) \ argument
52 PLL_DDR_OUTDIV(outdiv) | \
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| /rk3399_rockchip-uboot/arch/mips/mach-ath79/ar933x/ |
| H A D | lowlevel_init.S | 20 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
24 ((0x7 & outdiv) << 23) )
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