Searched refs:mr8 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | dram_spec_timing.h | 171 #define LPDDR2_DENSITY(mr8) (8 << (((mr8) >> 2) & 0xf)) argument
172 #define LPDDR2_IO_WIDTH(mr8) (32 >> (((mr8) >> 6) & 0x3)) argument
281 #define LPDDR3_DENSITY(mr8) (8 << (((mr8) >> 2) & 0xf)) argument
282 #define LPDDR3_IO_WIDTH(mr8) (32 >> (((mr8) >> 6) & 0x3)) argument
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ |
| H A D | start.S | 47 #define MR_CAC_CTL $mr8
125 mfsr $r1, $mr8
127 mtsr $r1, $mr8
137 mfsr $r1, $mr8
139 mtsr $r1, $mr8
144 mfsr $r1, $mr8
146 mtsr $r1, $mr8
|
| /rk3399_rockchip-uboot/drivers/ram/rockchip/ |
| H A D | sdram_rv1126.c | 2716 u32 mr8; in dram_detect_cap() local
2762 mr8 = read_mr(dram, 1, 0, 8, dram_type); in dram_detect_cap()
2763 cap_info->dbw = ((mr8 >> 6) & 0x3) == 0 ? 1 : 0; in dram_detect_cap()
2764 mr8 = (mr8 >> 2) & 0xf; in dram_detect_cap()
2765 if (mr8 >= 0 && mr8 <= 6) { in dram_detect_cap()
2766 cap_info->cs0_row = 14 + (mr8 + 1) / 2; in dram_detect_cap()
2767 } else if (mr8 == 0xc) { in dram_detect_cap()
2775 cap_info->row_3_4 = mr8 % 2 == 1 ? 1 : 0; in dram_detect_cap()
|