| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | Makefile | 7 obj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \ 9 obj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \ 11 obj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \ 13 obj-$(CONFIG_SYS_FSL_DDR4) += main.o util.o ctrl_regs.o options.o \
|
| /rk3399_rockchip-uboot/examples/api/ |
| H A D | crt0.S | 17 b main 35 b main 50 b main
|
| /rk3399_rockchip-uboot/lib/optee_clientApi/ |
| H A D | tabinary_to_cfile.py | 23 def main(): function 58 main()
|
| H A D | tabinary_to_img.py | 21 def main(): function 86 main()
|
| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/ |
| H A D | decode_bl31.py | 43 def main(): function 48 main()
|
| /rk3399_rockchip-uboot/arch/sandbox/ |
| H A D | config.mk | 20 -Wl,--start-group $(u-boot-main) -Wl,--end-group \ 24 -Wl,--start-group $(patsubst $(obj)/%,%,$(u-boot-spl-main)) \
|
| /rk3399_rockchip-uboot/scripts/ |
| H A D | fill_scrapyard.py | 132 def main(): function 166 main()
|
| H A D | diffconfig | 68 def main(): function 132 main()
|
| H A D | gcc-stack-usage.sh | 12 int main(void)
|
| H A D | bin2c.c | 12 int main(int argc, char *argv[]) in main() function
|
| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | sama5d2.dtsi | 53 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>; 61 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>; 80 main: mainck { label 81 compatible = "atmel,at91sam9x5-clk-main"; 89 clocks = <&main>; 106 clocks = <&main>; 124 clocks = <&main>; 131 clocks = <&main>, <&plladiv>, <&utmi>; 155 clocks = <&main>, <&plladiv>, <&utmi>, <&mck>; 520 clocks = <&main>, <&plla>, <&utmi>, <&mck>;
|
| /rk3399_rockchip-uboot/drivers/clk/at91/ |
| H A D | Kconfig | 8 the oscillators and PLLs, such as main clock, slow clock, 22 PLL is the main clock, so the main clock must select the
|
| H A D | Makefile | 6 obj-y += clk-slow.o clk-main.o clk-plla.o clk-master.o
|
| /rk3399_rockchip-uboot/scripts/kconfig/ |
| H A D | check.sh | 5 int main()
|
| /rk3399_rockchip-uboot/tools/ |
| H A D | gen_eth_addr.c | 14 main(int argc, char *argv[]) in main() function
|
| H A D | xway-swap-bytes.c | 12 int main (void) in main() function
|
| H A D | atmel_pmecc_params.c | 25 int main(int argc, char *argv[]) in main() function
|
| H A D | ncb.c | 7 int main (int argc, char *argv[]) in main() function
|
| H A D | gen_ethaddr_crc.c | 57 int main(int argc, char *argv[]) in main() function
|
| /rk3399_rockchip-uboot/arch/x86/lib/ |
| H A D | asm-offsets.c | 18 int main(void) in main() function
|
| /rk3399_rockchip-uboot/doc/device-tree-bindings/video/ |
| H A D | exynos_mipi_dsi.txt | 11 for main display or CPU interface for main or sub display). 12 samsung,dsim-config-e-virtual-ch: virtual channel number that main 14 samsung,dsim-config-e-pixel-format: pixel stream format for main
|
| /rk3399_rockchip-uboot/arch/arm/mach-exynos/ |
| H A D | clock.c | 1444 int main; in exynos5_set_spi_clk() local 1450 main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine); in exynos5_set_spi_clk() 1451 if (main < 0) { in exynos5_set_spi_clk() 1456 main = main - 1; in exynos5_set_spi_clk() 1490 clrsetbits_le32(reg, mask << shift, (main & mask) << shift); in exynos5_set_spi_clk() 1501 int main; in exynos5420_set_spi_clk() local 1508 main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine); in exynos5420_set_spi_clk() 1509 if (main < 0) { in exynos5420_set_spi_clk() 1514 main = main - 1; in exynos5420_set_spi_clk() 1554 clrsetbits_le32(reg, div_mask << shift, (main & div_mask) << shift); in exynos5420_set_spi_clk()
|
| /rk3399_rockchip-uboot/test/image/ |
| H A D | test-imagetools.sh | 190 main() function 226 main
|
| /rk3399_rockchip-uboot/lib/ |
| H A D | asm-offsets.c | 19 int main(void) in main() function
|
| /rk3399_rockchip-uboot/tools/gdb/ |
| H A D | gdbcont.c | 21 main(int ac, char **av) in main() function
|