Home
last modified time | relevance | path

Searched refs:lane_cnt (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/board/gdsys/common/
H A Ddp501.c55 u8 lane_cnt; in dp501_link_training() local
69 lane_cnt = 4; in dp501_link_training()
71 lane_cnt = max_lane_cnt; in dp501_link_training()
72 if (lane_cnt != max_lane_cnt) in dp501_link_training()
74 max_lane_cnt, lane_cnt); in dp501_link_training()
75 i2c_reg_write(addr, 0x5e, lane_cnt | (val & 0x80)); /* set lane_cnt */ in dp501_link_training()
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp.c177 unsigned char lane_cnt[16]; in exynos_dp_handle_edid() local
181 memset(lane_cnt, 0, 16); in exynos_dp_handle_edid()
230 priv->lane_cnt = temp; in exynos_dp_handle_edid()
282 exynos_dp_set_lane_count(regs, priv->lane_cnt); in exynos_dp_link_start()
286 buf[1] = priv->lane_cnt; in exynos_dp_link_start()
295 priv->lane_cnt); in exynos_dp_link_start()
403 for (i = 0; i < priv->lane_cnt; i++) { in exynos_dp_read_dpcd_lane_stat()
509 for (i = 0; i < priv->lane_cnt; i++) { in exynos_dp_process_clock_recovery()
544 for (i = 0; i < priv->lane_cnt; i++) { in exynos_dp_process_clock_recovery()
628 for (i = 0; i < priv->lane_cnt; i++) { in exynos_dp_process_equalizer_training()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Ddp_info.h71 unsigned char lane_cnt; member