Searched refs:feedback (Results 1 – 13 of 13) sorted by relevance
| /rk3399_rockchip-uboot/board/freescale/common/ |
| H A D | idt8t49n222a_serdes_clk.c | 36 enum serdes_refclk refclk2, u8 feedback) in set_serdes_refclk() argument
87 if (feedback != 0 && feedback != 1) { in set_serdes_refclk()
102 if (feedback) { in set_serdes_refclk()
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| H A D | idt8t49n222a_serdes_clk.h | 105 enum serdes_refclk refclk2, u8 feedback);
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| /rk3399_rockchip-uboot/board/freescale/ls1043aqds/ |
| H A D | README | 34 - Optional clock feedback paths, and optional high-speed voltage translation assistance
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| /rk3399_rockchip-uboot/board/freescale/ls1046aqds/ |
| H A D | README | 34 - Optional clock feedback paths, and optional high-speed voltage translation assistance
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | exynos5800-peach-pi.dts | 204 samsung,spi-feedback-delay = <1>;
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| H A D | rk3288-firefly.dtsi | 63 linux,default-trigger = "rc-feedback";
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| H A D | exynos5420-peach-pit.dts | 341 samsung,spi-feedback-delay = <1>;
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| /rk3399_rockchip-uboot/board/buffalo/lsxl/ |
| H A D | README | 30 the resuce mode is enabled, thus providing a visual feedback.
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| /rk3399_rockchip-uboot/board/freescale/t102xqds/ |
| H A D | README | 140 - upport for optional clock feedback paths.
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| /rk3399_rockchip-uboot/doc/driver-model/ |
| H A D | spi-howto.txt | 395 It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs.
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| H A D | spi-howto.rst | 430 It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs.
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| /rk3399_rockchip-uboot/tools/buildman/ |
| H A D | README | 935 each time. This provides quick feedback regarding the correctness of recent
958 This will provide the quickest possible feedback regarding the current content
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| /rk3399_rockchip-uboot/ |
| H A D | README | 3772 provide feedback to the other developers. The feedback normally takes
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