Searched refs:ddrpll (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/spear/ |
| H A D | spl.c | 23 u32 clkenb, ddrpll; in ddr_clock_init() local
33 ddrpll = readl(&misc_p->pll_ctr_reg); in ddr_clock_init()
34 ddrpll &= ~MEM_CLK_SEL_MSK; in ddr_clock_init()
36 ddrpll |= MEM_CLK_HCLK; in ddr_clock_init()
38 ddrpll |= MEM_CLK_2HCLK; in ddr_clock_init()
40 ddrpll |= MEM_CLK_PLL2; in ddr_clock_init()
44 writel(ddrpll, &misc_p->pll_ctr_reg); in ddr_clock_init()
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| /rk3399_rockchip-uboot/arch/mips/mach-ath79/ar934x/ |
| H A D | clk.c | 262 u32 ctrl, cpu, cpupll, ddr, ddrpll; in ar934x_update_clock() local
274 ddrpll = ar934x_ddrpll_to_hz(ddr); in ar934x_update_clock()
281 cpuclk = ddrpll; in ar934x_update_clock()
286 ddrclk = ddrpll; in ar934x_update_clock()
293 busclk = ddrpll; in ar934x_update_clock()
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | zynq-7000.dtsi | 270 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
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