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Searched refs:clk_period (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Dtegra_nand.c857 u32 reg_val, clk_rate, clk_period, time_val; in setup_timing() local
861 clk_period = 1000 / clk_rate; in setup_timing()
862 reg_val = ((timing[FDT_NAND_MAX_TRP_TREA] / clk_period) << in setup_timing()
864 reg_val |= ((timing[FDT_NAND_TWB] / clk_period) << in setup_timing()
866 time_val = timing[FDT_NAND_MAX_TCR_TAR_TRR] / clk_period; in setup_timing()
870 reg_val |= ((timing[FDT_NAND_TWHR] / clk_period) << in setup_timing()
872 time_val = timing[FDT_NAND_MAX_TCS_TCH_TALS_TALH] / clk_period; in setup_timing()
876 reg_val |= ((timing[FDT_NAND_TWH] / clk_period) << in setup_timing()
878 reg_val |= ((timing[FDT_NAND_TWP] / clk_period) << in setup_timing()
880 reg_val |= ((timing[FDT_NAND_TRH] / clk_period) << in setup_timing()
[all …]
H A Dsunxi_nand.c1207 u32 clk_period) in _sunxi_nand_lookup_timing() argument
1209 u32 clk_cycles = DIV_ROUND_UP(duration, clk_period); in _sunxi_nand_lookup_timing()