| /rk3399_rockchip-uboot/drivers/thermal/ |
| H A D | rockchip_thermal.c | 67 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04) argument
68 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04) argument
69 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04) argument
70 #define TSADCV3_DATA(chn) (0x2c + (chn) * 0x04) argument
71 #define TSADCV3_COMP_INT(chn) (0x6c + (chn) * 0x04) argument
72 #define TSADCV3_COMP_SHUT(chn) (0x10c + (chn) * 0x04) argument
85 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) argument
86 #define TSADCV3_AUTO_SRC_EN(chn) BIT(chn) argument
87 #define TSADCV3_AUTO_SRC_EN_MASK(chn) BIT(16 + (chn)) argument
94 #define TSADCV2_INT_SRC_EN(chn) BIT(chn) argument
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| /rk3399_rockchip-uboot/drivers/input/ |
| H A D | spl_adc_key.c | 41 u32 chn[2], adc; in key_read() local
58 chn, ARRAY_SIZE(chn)); in key_read()
130 ret = adc_channel_single_shot("saradc", chn[1], &adc); in key_read()
132 ret = adc_channel_single_shot("adc", chn[1], &adc); in key_read()
134 debug("Failed to read adc%d, ret=%d\n", chn[1], ret); in key_read()
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| H A D | adc_key.c | 16 u32 voltage, chn[2]; in adc_key_ofdata_to_platdata() local
26 "io-channels", chn, ARRAY_SIZE(chn)); in adc_key_ofdata_to_platdata()
65 uc_key->channel = chn[1]; in adc_key_ofdata_to_platdata()
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| H A D | rk_key.c | 14 u32 chn[2]; in rk_key_ofdata_to_platdata() local
23 if (dev_read_u32_array(dev_get_parent(dev), "io-channels", chn, 2)) { in rk_key_ofdata_to_platdata()
31 uc_key->channel = chn[1]; in rk_key_ofdata_to_platdata()
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| /rk3399_rockchip-uboot/test/rockchip/ |
| H A D | test-misc.c | 198 uint val, chn; in do_test_adc() local
201 chn = argc < 2 ? 0 : strtoul(argv[1], NULL, 10); in do_test_adc()
202 ret = adc_channel_single_shot("saradc", chn, &val); in do_test_adc()
204 ret = adc_channel_single_shot("adc", chn, &val); in do_test_adc()
206 ut_err("adc: failed to get channel%d value, ret=%d\n", chn, ret); in do_test_adc()
208 printf("adc channel%d: adc value is %d\n", chn, val); in do_test_adc()
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| /rk3399_rockchip-uboot/drivers/crypto/rockchip/ |
| H A D | rkce_core.c | 32 struct rkce_chn_info chn[RKCE_TD_TYPE_MAX]; member
381 hardware->chn[RKCE_TD_TYPE_SYMM].td_virt = td; in rkce_push_td()
399 hardware->chn[RKCE_TD_TYPE_HASH].td_virt = td; in rkce_push_td()
545 hardware->chn[RKCE_TD_TYPE_SYMM].cb_func = cb_func; in rkce_irq_callback_set()
547 hardware->chn[RKCE_TD_TYPE_HASH].cb_func = cb_func; in rkce_irq_callback_set()
565 cur_chn = &hardware->chn[RKCE_TD_TYPE_SYMM]; in rkce_irq_handler()
577 cur_chn = &hardware->chn[RKCE_TD_TYPE_HASH]; in rkce_irq_handler()
597 for (i = 0; i < ARRAY_SIZE(hardware->chn); i++) { in rkce_irq_thread()
598 struct rkce_chn_info *cur_chn = &hardware->chn[i]; in rkce_irq_thread()
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| H A D | crypto_v2.c | 206 static inline void write_key_reg(u32 chn, const u8 *key, u32 key_len) in write_key_reg() argument
208 write_regs(CRYPTO_CH0_KEY_0 + chn * 0x10, key, key_len); in write_key_reg()
211 static inline void set_iv_reg(u32 chn, const u8 *iv, u32 iv_len) in set_iv_reg() argument
215 base_iv = CRYPTO_CH0_IV_0 + chn * 0x10; in set_iv_reg()
225 crypto_write(iv_len, CRYPTO_CH0_IV_LEN_0 + 4 * chn); in set_iv_reg()
228 static inline void get_iv_reg(u32 chn, u8 *iv, u32 iv_len) in get_iv_reg() argument
232 base_iv = CRYPTO_CH0_IV_0 + chn * 0x10; in get_iv_reg()
237 static inline void get_tag_from_reg(u32 chn, u8 *tag, u32 tag_len) in get_tag_from_reg() argument
240 u32 chn_base = CRYPTO_CH0_TAG_0 + 0x10 * chn; in get_tag_from_reg()
764 static inline void set_pc_len_reg(u32 chn, u64 pc_len) in set_pc_len_reg() argument
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