Searched refs:XUSB_PADCTL_IOPHY_PLL_P0_CTL2 (Results 1 – 1 of 1) sorted by relevance
28 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044 macro187 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_phy_enable()191 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_phy_enable()