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Searched refs:XCHAL_ICACHE_SIZE (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/arch/xtensa/include/asm/
H A Dcacheasm.h17 #define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS)
93 #if XCHAL_ICACHE_LINE_LOCKABLE && XCHAL_ICACHE_SIZE
94 __loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH
130 #if XCHAL_ICACHE_SIZE
168 #if XCHAL_ICACHE_SIZE
205 #if XCHAL_ICACHE_SIZE
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h125 #define XCHAL_ICACHE_SIZE 16384 /* I-cache size in bytes or 0 */ macro
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h144 #define XCHAL_ICACHE_SIZE 16384 /* I-cache size in bytes or 0 */ macro
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h192 #define XCHAL_ICACHE_SIZE 8192 /* I-cache size in bytes or 0 */ macro