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Searched refs:UIC_ARG_MIB_SEL (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/drivers/ufs/
H A Dufs-rockchip.c125 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(PA_LOCAL_TX_LCC_ENABLE, 0x0), 0x0); in ufs_rockchip_rk3576_phy_init()
127 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x200, 0x0), 0x40); in ufs_rockchip_rk3576_phy_init()
130 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xaa, SEL_TX_LANE0 + i), 0x06); in ufs_rockchip_rk3576_phy_init()
131 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xa9, SEL_TX_LANE0 + i), 0x02); in ufs_rockchip_rk3576_phy_init()
132 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xad, SEL_TX_LANE0 + i), 0x44); in ufs_rockchip_rk3576_phy_init()
133 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xac, SEL_TX_LANE0 + i), 0xe6); in ufs_rockchip_rk3576_phy_init()
134 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xab, SEL_TX_LANE0 + i), 0x07); in ufs_rockchip_rk3576_phy_init()
135 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x94, SEL_TX_LANE0 + i), 0x93); in ufs_rockchip_rk3576_phy_init()
136 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x93, SEL_TX_LANE0 + i), 0xc9); in ufs_rockchip_rk3576_phy_init()
137 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x7f, SEL_TX_LANE0 + i), 0x00); in ufs_rockchip_rk3576_phy_init()
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H A Dufs.h601 #define UIC_ARG_MIB_SEL(attr, sel) ((((attr) & 0xFFFF) << 16) |\ macro
603 #define UIC_ARG_MIB(attr) UIC_ARG_MIB_SEL(attr, 0)
613 #define UIC_ARG_MIB_SEL(attr, sel) ((((attr) & 0xFFFF) << 16) |\ macro
615 #define UIC_ARG_MIB(attr) UIC_ARG_MIB_SEL(attr, 0)
H A Dufs.c326 UIC_ARG_MIB_SEL(TX_LCC_ENABLE, in ufshcd_disable_tx_lcc()
331 UIC_ARG_MIB_SEL(TX_LCC_ENABLE, in ufshcd_disable_tx_lcc()