Searched refs:SPRN_L1CSR1 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | release.S | 98 mtspr SPRN_L1CSR1,r2
100 mfspr r3,SPRN_L1CSR1
106 mtspr SPRN_L1CSR1,r3
109 mfspr r3,SPRN_L1CSR1
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| H A D | start.S | 774 mtspr SPRN_L1CSR1,r2
776 mfspr r3,SPRN_L1CSR1
782 mtspr SPRN_L1CSR1,r3
785 mfspr r3,SPRN_L1CSR1
936 mtspr SPRN_L1CSR1,r3
939 mfspr r4,SPRN_L1CSR1
947 mtspr SPRN_L1CSR1,r3
950 mfspr r4,SPRN_L1CSR1
986 mfspr r11, SPRN_L1CSR1
990 mtspr SPRN_L1CSR1, r11
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| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | processor.h | 491 #define SPRN_L1CSR1 0x3f3 /* L1 Instruction Cache Control and Status Register 1 */ macro
734 #define L1CSR1 SPRN_L1CSR1
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