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Searched refs:SPD (Results 1 – 17 of 17) sorted by relevance

/rk3399_rockchip-uboot/drivers/ddr/fsl/
H A DMakefile17 SPD := y macro
20 SPD := y macro
22 ifdef SPD
/rk3399_rockchip-uboot/board/freescale/p1_p2_rdb_pc/
H A DREADME26 is used to store SPD data. In case of absent or corrupted SPD, falling back
/rk3399_rockchip-uboot/doc/
H A DREADME.fsl-ddr293 type command "print" with arguments to show SPD, options, registers
300 type command "recompute" to reload SPD and start over
313 spd - print SPD data
314 dimmparms - DIMM parameters, calculated from SPD
323 spd - print SPD data
324 dimmparms - DIMM parameters, calculated from SPD
330 byte number if the object is SPD
341 no argument - reload SPD and start over
H A DREADME.b4860qds335 SPL further initialise DDR using SPD and environment variables and copy
/rk3399_rockchip-uboot/board/sbc8548/
H A DREADME65 Memory Size and using SPD:
69 for 256MB of DDR2 @400MHz. It does not by default use the DDR2 SPD
73 SPD EEPROM to land at the same address as the DDR2 SPD EEPROM, so
74 that the SPD data can not be read reliably. You can test if your
100 issue and allow SPD autodetection of RAM to work.
/rk3399_rockchip-uboot/drivers/net/
H A Dmacb.c549 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); in macb_phy_init()
575 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD) | GEM_BIT(GBE)); in macb_phy_init()
577 ncfgr |= MACB_BIT(SPD); in macb_phy_init()
/rk3399_rockchip-uboot/doc/device-tree-bindings/misc/
H A Dintel,baytrail-fsp.txt45 do not set "fsp,enable-memory-down", then the DIMM SPD information will be
/rk3399_rockchip-uboot/board/freescale/t4qds/
H A DREADME146 SPL further initialise DDR using SPD and environment variables
/rk3399_rockchip-uboot/board/hisilicon/poplar/
H A DREADME114 SPD=none BL33=~/poplar/bin/u-boot.bin DEBUG=1 PLAT=poplar
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dzynqmp-zcu102-revA.dts521 dev@51 { /* u-boot detection - maybe SPD */
/rk3399_rockchip-uboot/board/freescale/t208xrdb/
H A DREADME199 SPL further initializes DDR using SPD and environment variables
/rk3399_rockchip-uboot/board/freescale/t208xqds/
H A DREADME218 SPL further initializes DDR using SPD and environment variables
/rk3399_rockchip-uboot/board/freescale/t104xrdb/
H A DREADME230 SPL further initialise DDR using SPD and environment variables and copy
/rk3399_rockchip-uboot/board/freescale/t102xrdb/
H A DREADME257 SPL further initializes DDR using SPD and environment variables
/rk3399_rockchip-uboot/board/freescale/t102xqds/
H A DREADME275 SPL further initializes DDR using SPD and environment variables
/rk3399_rockchip-uboot/
H A DREADME2046 If defined, then this indicates the I2C bus number for DDR SPD.
2047 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
3475 I2C address of the SPD EEPROM
3478 If SPD EEPROM is on an I2C bus other than the first
3483 Get DDR timing information from other than SPD. Common with
3484 soldered DDR chips onboard without SPD. DDR raw timing
/rk3399_rockchip-uboot/common/
H A Dedid.c6618 if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(SPD)) != 0) in hdmi_spd_infoframe_unpack()