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Searched refs:SGRF_BASE (Results 1 – 5 of 5) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3368/
H A Drk3368.c234 const uintptr_t SGRF_BASE = in sgrf_soc_con_addr() local
237 return SGRF_BASE + sizeof(u32) * no; in sgrf_soc_con_addr()
242 const uintptr_t SGRF_BASE = in sgrf_busdmac_addr() local
245 const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET; in sgrf_busdmac_addr()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3568/
H A Drk3568.c45 #define SGRF_BASE 0xFDD18000 macro
874 writel(((0x3 << 11 | 0x1 << 4) << 16), SGRF_BASE + SGRF_SOC_CON4); in arch_cpu_init()
885 writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3); in arch_cpu_init()
928 writel(0x00030000, SGRF_BASE + SGRF_SOC_CON4); /* usb3otg0 master secure setting */ in arch_cpu_init()
931 writel(((0x3 << 11 | 0x1 << 4) << 16), SGRF_BASE + SGRF_SOC_CON4); in arch_cpu_init()
948 writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3); in arch_cpu_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rv1126/
H A Drv1126.c96 #define SGRF_BASE 0xFE0A0000 macro
793 writel(entry_point, SGRF_BASE + SGRF_CON_SCR1_BOOT_ADDR); in spl_fit_standalone_release()
794 writel(0x00ff00bf, SGRF_BASE + SGRF_SOC_CON3); in spl_fit_standalone_release()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3308/
H A Drk3308.c49 #define SGRF_BASE 0xff2b0000 macro
205 static struct rk3308_sgrf * const sgrf = (void *)SGRF_BASE; in arch_cpu_init()
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Dsdram_rk3308.c29 #define SGRF_BASE 0xff2b0000 macro
861 sdram_priv.sgrf = (void *)SGRF_BASE; in sdram_init()