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Searched refs:RES_CFG (Results 1 – 13 of 13) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/
H A Dmaxim-max96772.h19 #define RES_CFG BIT(7) macro
H A Dmaxim-max96752.h21 #define RES_CFG BIT(7) macro
H A Dmaxim-max96752.c470 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96752_pinctrl_config_set()
488 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96752_pinctrl_config_set()
H A Dmaxim-max96745.h86 #define RES_CFG BIT(7) macro
H A Dmaxim-max96755.c563 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96755_pinctrl_config_set()
581 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96755_pinctrl_config_set()
H A Dmaxim-max96772.c645 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96772_pinctrl_config_set()
663 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96772_pinctrl_config_set()
H A Dmaxim-max96789.c565 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96789_pinctrl_config_set()
583 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96789_pinctrl_config_set()
H A Dmaxim-max96745.c660 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96745_pinctrl_config_set()
678 RES_CFG, FIELD_PREP(RES_CFG, res_cfg)); in max96745_pinctrl_config_set()
H A Dmaxim-max96755.h97 #define RES_CFG BIT(7) macro
H A Dmaxim-max96789.h101 #define RES_CFG BIT(7) macro
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-max96755f.c430 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(pin), RES_CFG, in max96755f_pinconf_set()
431 FIELD_PREP(RES_CFG, res_cfg)); in max96755f_pinconf_set()
454 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(pin), RES_CFG, in max96755f_pinconf_set()
455 FIELD_PREP(RES_CFG, res_cfg)); in max96755f_pinconf_set()
/rk3399_rockchip-uboot/include/
H A Dmax96745.h43 #define RES_CFG BIT(7) macro
H A Dmax96755f.h79 #define RES_CFG BIT(7) macro