Searched refs:R300_PPLL_REF_DIV_ACC_MASK (Results 1 – 2 of 2) sorted by relevance
250 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_write_pll_regs()259 ~R300_PPLL_REF_DIV_ACC_MASK); in radeon_write_pll_regs()
995 #define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) macro