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Searched refs:QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/
H A Dclk.c83 & QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK) + 1; in get_clocks()
/rk3399_rockchip-uboot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h454 #define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f macro