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Searched refs:PULL_UPDN_SEL (Results 1 – 13 of 13) sorted by relevance

/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-max96755f.c412 PULL_UPDN_SEL, in max96755f_pinconf_set()
413 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96755f_pinconf_set()
436 PULL_UPDN_SEL, in max96755f_pinconf_set()
437 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96755f_pinconf_set()
460 PULL_UPDN_SEL, in max96755f_pinconf_set()
461 FIELD_PREP(PULL_UPDN_SEL, 2)); in max96755f_pinconf_set()
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/
H A Dmaxim-max96752.c454 PULL_UPDN_SEL, in max96752_pinctrl_config_set()
455 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96752_pinctrl_config_set()
472 PULL_UPDN_SEL, in max96752_pinctrl_config_set()
473 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96752_pinctrl_config_set()
490 PULL_UPDN_SEL, in max96752_pinctrl_config_set()
491 FIELD_PREP(PULL_UPDN_SEL, 2)); in max96752_pinctrl_config_set()
H A Dmaxim-max96772.h29 #define PULL_UPDN_SEL GENMASK(7, 6) macro
H A Dmaxim-max96752.h31 #define PULL_UPDN_SEL GENMASK(7, 6) macro
H A Dmaxim-max96755.c547 PULL_UPDN_SEL, in max96755_pinctrl_config_set()
548 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96755_pinctrl_config_set()
565 PULL_UPDN_SEL, in max96755_pinctrl_config_set()
566 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96755_pinctrl_config_set()
583 PULL_UPDN_SEL, in max96755_pinctrl_config_set()
584 FIELD_PREP(PULL_UPDN_SEL, 2)); in max96755_pinctrl_config_set()
H A Dmaxim-max96772.c629 PULL_UPDN_SEL, in max96772_pinctrl_config_set()
630 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96772_pinctrl_config_set()
647 PULL_UPDN_SEL, in max96772_pinctrl_config_set()
648 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96772_pinctrl_config_set()
665 PULL_UPDN_SEL, in max96772_pinctrl_config_set()
666 FIELD_PREP(PULL_UPDN_SEL, 2)); in max96772_pinctrl_config_set()
H A Dmaxim-max96789.c549 PULL_UPDN_SEL, in max96789_pinctrl_config_set()
550 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96789_pinctrl_config_set()
567 PULL_UPDN_SEL, in max96789_pinctrl_config_set()
568 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96789_pinctrl_config_set()
585 PULL_UPDN_SEL, in max96789_pinctrl_config_set()
586 FIELD_PREP(PULL_UPDN_SEL, 2)); in max96789_pinctrl_config_set()
H A Dmaxim-max96745.c644 PULL_UPDN_SEL, in max96745_pinctrl_config_set()
645 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96745_pinctrl_config_set()
662 PULL_UPDN_SEL, in max96745_pinctrl_config_set()
663 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96745_pinctrl_config_set()
680 PULL_UPDN_SEL, in max96745_pinctrl_config_set()
681 FIELD_PREP(PULL_UPDN_SEL, 2)); in max96745_pinctrl_config_set()
H A Dmaxim-max96745.h93 #define PULL_UPDN_SEL GENMASK(7, 6) macro
H A Dmaxim-max96755.h107 #define PULL_UPDN_SEL GENMASK(7, 6) macro
H A Dmaxim-max96789.h111 #define PULL_UPDN_SEL GENMASK(7, 6) macro
/rk3399_rockchip-uboot/include/
H A Dmax96745.h50 #define PULL_UPDN_SEL GENMASK(7, 6) macro
H A Dmax96755f.h89 #define PULL_UPDN_SEL GENMASK(7, 6) macro