Searched refs:PLLE_MISC (Results 1 – 4 of 4) sorted by relevance
637 #define PLLE_MISC 0x0ec macro662 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()690 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()694 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()696 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()705 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()709 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()721 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
666 #define PLLE_MISC 0x0ec macro691 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()719 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()723 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()725 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()751 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()755 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()767 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1135 #define PLLE_MISC 0x0ec macro1171 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1173 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1192 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1197 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1208 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1241 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1243 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
950 #define PLLE_MISC 0x0ec macro978 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()985 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()