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Searched refs:PLLE_AUX (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1144 #define PLLE_AUX 0x48c macro
1167 value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
1169 writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
1245 value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
1250 writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
1256 writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/
H A Dclock.c958 #define PLLE_AUX 0x48c macro
971 value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
974 writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()