Searched refs:PADS_PLL_CTL_REFCLK_INTERNAL_CML (Results 1 – 1 of 1) sorted by relevance
153 #define PADS_PLL_CTL_REFCLK_INTERNAL_CML (0x0 << 16) macro692 value |= PADS_PLL_CTL_REFCLK_INTERNAL_CML | soc->tx_ref_sel; in tegra_pcie_phy_enable()