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Searched refs:MEGA (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_training_static.c158 u32 adll_period = MEGA / freq_val[frequency] / 64; in ddr3_tip_write_leveling_static_config()
218 u32 sdr_period = MEGA / freq_val[frequency]; in ddr3_tip_read_leveling_static_config()
219 u32 ddr_period = MEGA / freq_val[frequency] / 2; in ddr3_tip_read_leveling_static_config()
220 u32 adll_period = MEGA / freq_val[frequency] / 64; in ddr3_tip_read_leveling_static_config()
H A Dddr3_training_ip_flow.h49 #define MEGA 1000000 macro
H A Dddr3_training.c368 t_ckclk = (MEGA / freq_val[freq]); in hws_ddr3_tip_init_controller()
661 adll_tap = MEGA / (freq_val[freq] * 64); in hws_ddr3_tip_init_controller()
1379 t_hclk = MEGA / (freq_val[frequency] / 2); in ddr3_tip_freq_set()
1480 adll_tap = MEGA / (freq_val[frequency] * 64); in ddr3_tip_freq_set()
1631 t_ckclk = (MEGA / freq_val[frequency]); in ddr3_tip_set_timing()
H A Dddr3_training_pbs.c43 int adll_tap = MEGA / freq_val[medium_freq] / 64; in ddr3_tip_pbs()