| /rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/ |
| H A D | maxim-max96772.h | 16 #define GPIO_C_REG(gpio) (0x02b2 + ((gpio) * 3)) macro
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| H A D | maxim-max96752.h | 18 #define GPIO_C_REG(gpio) (0x0202 + ((gpio) * 3)) macro
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| H A D | maxim-max96752.c | 345 GPIO_C_REG(offset), in max96752_pinctrl_set_pin_mux()
412 GPIO_C_REG(offset), in max96752_pinctrl_set_grp_mux()
453 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96752_pinctrl_config_set()
471 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96752_pinctrl_config_set()
489 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96752_pinctrl_config_set()
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| H A D | maxim-max96755.c | 442 GPIO_C_REG(offset), in max96755_pinctrl_set_pin_mux()
507 GPIO_C_REG(offset), in max96755_pinctrl_set_grp_mux()
546 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96755_pinctrl_config_set()
564 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96755_pinctrl_config_set()
582 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96755_pinctrl_config_set()
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| H A D | maxim-max96772.c | 522 GPIO_C_REG(offset), in max96772_pinctrl_set_pin_mux()
588 GPIO_C_REG(offset), in max96772_pinctrl_set_grp_mux()
628 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96772_pinctrl_config_set()
646 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96772_pinctrl_config_set()
664 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96772_pinctrl_config_set()
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| H A D | maxim-max96789.c | 442 GPIO_C_REG(offset), in max96789_pinctrl_set_pin_mux()
507 GPIO_C_REG(offset), in max96789_pinctrl_set_grp_mux()
548 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96789_pinctrl_config_set()
566 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96789_pinctrl_config_set()
584 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96789_pinctrl_config_set()
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| H A D | maxim-max96745.c | 537 GPIO_C_REG(offset), in max96745_pinctrl_set_pin_mux()
608 GPIO_C_REG(offset), in max96745_pinctrl_set_grp_mux()
643 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96745_pinctrl_config_set()
661 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96745_pinctrl_config_set()
679 serdes_set_bits(serdes, GPIO_C_REG(pin_selector), in max96745_pinctrl_config_set()
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| H A D | maxim-max96745.h | 18 #define GPIO_C_REG(gpio) (0x0202 + ((gpio) * 8)) macro
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| H A D | maxim-max96755.h | 18 #define GPIO_C_REG(gpio) (0x02c0 + ((gpio) * 3)) macro
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| H A D | maxim-max96789.h | 18 #define GPIO_C_REG(gpio) (0x02c0 + ((gpio) * 3)) macro
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| /rk3399_rockchip-uboot/drivers/pinctrl/ |
| H A D | pinctrl-max96755f.c | 370 GPIO_C_REG(grp->pins[i]), in max96755f_pinmux_set()
411 ret = dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(pin), in max96755f_pinconf_set()
435 ret = dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(pin), in max96755f_pinconf_set()
459 ret = dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(pin), in max96755f_pinconf_set()
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| H A D | pinctrl-max96745.c | 370 dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(grp->pins[i]), in max96745_pinmux_set()
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| /rk3399_rockchip-uboot/include/ |
| H A D | max96745.h | 13 #define GPIO_C_REG(gpio) (0x0202 + ((gpio) * 8)) macro
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| H A D | max96755f.h | 15 #define GPIO_C_REG(gpio) (0x02c0 + ((gpio) * 3)) macro
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