| /rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/ |
| H A D | maxim-max96772.h | 14 #define GPIO_A_REG(gpio) (0x02b0 + ((gpio) * 3)) macro
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| H A D | maxim-max96752.h | 16 #define GPIO_A_REG(gpio) (0x0200 + ((gpio) * 3)) macro
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| H A D | maxim-max96752.c | 332 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96752_pinctrl_set_pin_mux()
399 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96752_pinctrl_set_grp_mux()
469 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96752_pinctrl_config_set()
487 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96752_pinctrl_config_set()
494 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96752_pinctrl_config_set()
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| H A D | maxim-max96755.c | 429 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96755_pinctrl_set_pin_mux()
495 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96755_pinctrl_set_grp_mux()
562 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96755_pinctrl_config_set()
580 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96755_pinctrl_config_set()
587 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96755_pinctrl_config_set()
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| H A D | maxim-max96772.c | 509 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96772_pinctrl_set_pin_mux()
575 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96772_pinctrl_set_grp_mux()
644 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96772_pinctrl_config_set()
662 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96772_pinctrl_config_set()
669 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96772_pinctrl_config_set()
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| H A D | maxim-max96789.c | 429 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96789_pinctrl_set_pin_mux()
495 serdes_set_bits(serdes, GPIO_A_REG(offset), in max96789_pinctrl_set_grp_mux()
564 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96789_pinctrl_config_set()
582 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96789_pinctrl_config_set()
589 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96789_pinctrl_config_set()
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| H A D | maxim-max96745.c | 527 GPIO_A_REG(offset), in max96745_pinctrl_set_pin_mux()
598 GPIO_A_REG(offset), in max96745_pinctrl_set_grp_mux()
659 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96745_pinctrl_config_set()
677 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96745_pinctrl_config_set()
684 serdes_set_bits(serdes, GPIO_A_REG(pin_selector), in max96745_pinctrl_config_set()
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| H A D | maxim-max96745.h | 16 #define GPIO_A_REG(gpio) (0x0200 + ((gpio) * 8)) macro
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| H A D | maxim-max96755.h | 16 #define GPIO_A_REG(gpio) (0x02be + ((gpio) * 3)) macro
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| H A D | maxim-max96789.h | 16 #define GPIO_A_REG(gpio) (0x02be + ((gpio) * 3)) macro
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| /rk3399_rockchip-uboot/drivers/pinctrl/ |
| H A D | pinctrl-max96755f.c | 352 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]), in max96755f_pinmux_set()
430 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(pin), RES_CFG, in max96755f_pinconf_set()
454 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(pin), RES_CFG, in max96755f_pinconf_set()
467 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(pin), in max96755f_pinconf_set()
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| H A D | pinctrl-max96745.c | 360 dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]), in max96745_pinmux_set()
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| /rk3399_rockchip-uboot/include/ |
| H A D | max96745.h | 11 #define GPIO_A_REG(gpio) (0x0200 + ((gpio) * 8)) macro
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| H A D | max96755f.h | 13 #define GPIO_A_REG(gpio) (0x02be + ((gpio) * 3)) macro
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