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Searched refs:FW_DDR_MST5_REG (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3562/
H A Drk3562.c26 #define FW_DDR_MST5_REG 0x34 /* fspi */ macro
669 val = readl(FIREWALL_DDR_BASE + FW_DDR_MST5_REG); in arch_cpu_init()
670 writel(val & 0x00ffffff, FIREWALL_DDR_BASE + FW_DDR_MST5_REG); in arch_cpu_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3588/
H A Drk3588.c22 #define FW_DDR_MST5_REG 0x54 macro
927 secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST5_REG); in arch_cpu_init()
929 writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST5_REG); in arch_cpu_init()
1019 secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST5_REG); in arch_cpu_init()
1021 writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST5_REG); in arch_cpu_init()