Searched refs:DS (Results 1 – 5 of 5) sorted by relevance
114 #undef DS121 u16 CS, DS, SS, ES, FS, GS; member172 #define R_DS seg.DS
13 #define DS 7 macro
359 info->rl_val[cs][idx][DS] = delay; in overrun()876 dram_info->rl_val[cs][idx][DS] = in ddr3_read_leveling_single_cs_window_mode()1098 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][DS], 2); in ddr3_read_leveling_single_cs_window_mode()1117 MAX_DELAY_INV + dram_info->rl_val[cs][idx][DS]; in ddr3_read_leveling_single_cs_window_mode()1134 MAX_DELAY + dram_info->rl_val[cs][idx][DS]; in ddr3_read_leveling_single_cs_window_mode()1156 dram_info->rl_val[cs][idx][DS]; in ddr3_read_leveling_single_cs_window_mode()
118 #define DS 3 macro
10 Like the 85xx CDS systems, the 8544 DS board has two flash banks.