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Searched refs:DPCD_INTERLANE_ALIGN_DONE (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp.c626 interlane_aligned = (sink_stat & DPCD_INTERLANE_ALIGN_DONE); in exynos_dp_process_equalizer_training()
650 && (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) { in exynos_dp_process_equalizer_training()
/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Ddp.h719 #define DPCD_INTERLANE_ALIGN_DONE (0x1 << 0) macro