| /rk3399_rockchip-uboot/board/cadence/xtfpga/ |
| H A D | README | 51 The LX60/LX110/LX200/ML605 contain an 8-way DIP switch that controls 55 Boot Mapping (DIP switch 8): 57 DIP switch 8 maps the system ROM address space (in which the 60 and cannot be disabled by software, therefore DIP switch 8 is no 61 available for application use. Note DIP switch 7 is reserved by 80 Default MAC Address (DIP switches 1-6): 84 value whose least significant 6 bits come from DIP switches 1-6. 86 according to the DIP switches, where "on"==1 and "off"==0, and 93 used and the DIP switches no longer consulted. DIP swithes 1-6 96 The KC705 board contains 4-way DIP switch, way 1 is the boot mapping
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| /rk3399_rockchip-uboot/board/phytec/pcm058/ |
| H A D | README | 25 The dip switch "DIP-1" on the board let choose between 28 DIP-1 set to off: Boot first from NAND, then try SPI 29 DIP-1 set to on: Boot first from SD, then try SPI 31 The bootloader was tested with DIP-1 set to on. If a SD-card
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| /rk3399_rockchip-uboot/board/freescale/p2041rdb/ |
| H A D | README | 36 5. Change DIP-switch 59 5. Change DIP-switch 84 5. Change DIP-switch
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| /rk3399_rockchip-uboot/board/freescale/mpc8610hpcd/ |
| H A D | README | 70 DIP Switch Settings 72 To manually switch the flash banks using the DIP switch
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| /rk3399_rockchip-uboot/board/renesas/alt/ |
| H A D | Kconfig | 19 DIP switch of board in order to use this function.
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| /rk3399_rockchip-uboot/board/freescale/p1_p2_rdb_pc/ |
| H A D | README | 37 SD width is based off DIP switch. DIP switch is detected on the
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| /rk3399_rockchip-uboot/board/freescale/mx28evk/ |
| H A D | README | 17 To boot MX28EVK from an SD card, set the boot mode DIP switches as: 26 To boot MX28EVK from SPI NOR flash, set the boot mode DIP switches as:
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| /rk3399_rockchip-uboot/board/freescale/mpc8315erdb/ |
| H A D | README | 8 To boot the image at 0xFE000000 in NOR flash, use these DIP 19 DIP switch settings for S3 S4:
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| /rk3399_rockchip-uboot/board/freescale/mpc8313erdb/ |
| H A D | README | 8 To boot the image at 0xFE000000 in NOR flash, use these DIP 19 DIP switch settings for S3 S4:
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| /rk3399_rockchip-uboot/board/renesas/sh7785lcr/ |
| H A D | README.sh7785lcr | 21 This board has 2 physical memory maps. It can be changed with DIP switch(S2-5). 86 - dipsw : test DIP switch
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| /rk3399_rockchip-uboot/board/freescale/p1010rdb/ |
| H A D | README.P1010RDB-PB | 62 P1010RDB-PB default DIP-switch settings 71 P1010RDB-PB boot mode settings via DIP-switch 80 Switch P1010RDB-PB boot mode via software without setting DIP-switch
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| H A D | README.P1010RDB-PA | 80 Settings of DIP-switch
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| /rk3399_rockchip-uboot/board/freescale/mpc832xemds/ |
| H A D | README | 4 1.0 There are five Dual-In-Line Packages(DIP) Switches on MPC832XE SYS board 102 1)Make sure the DIP SW support PCI mode as described in Section 1.1.
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| /rk3399_rockchip-uboot/board/freescale/t102xrdb/ |
| H A D | README | 202 via DIP-switch: set SW3[5:7] = '100' 205 via DIP-switch: set SW3[5:7] = '100' 210 via DIP-Switch: set SW3[5:7] = '000' 213 via DIP-switch: set SW3[5:7] = '000'
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| /rk3399_rockchip-uboot/board/freescale/t208xrdb/ |
| H A D | README | 139 T2080PCIe-RDB Default DIP-Switch setting 159 via DIP-switch: set SW3[5:7] = '100' 163 via DIP-Switch: set SW3[5:7] = '000'
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| /rk3399_rockchip-uboot/include/ |
| H A D | sym53c8xx.h | 102 #define DIP 0x01 /* sta: host/script interrupt */ macro
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| /rk3399_rockchip-uboot/board/freescale/c29xpcie/ |
| H A D | README | 50 Settings of DIP-switch
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| /rk3399_rockchip-uboot/board/freescale/mpc837xemds/ |
| H A D | README | 4 1.0 There are four Dual-In-Line Packages(DIP) Switches on MPC837xEMDS board
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.mxs | 142 To boot a MXS based board from SD, set the boot mode DIP switches according to 191 To boot a MX28 based board from NAND, set the boot mode DIP switches according 287 Power off the board and set the boot mode DIP switches to boot from the SPI NOR
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| H A D | README.b4860qds | 78 RCW source is set by appropriate DIP-switches:
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| /rk3399_rockchip-uboot/board/freescale/t102xqds/ |
| H A D | README | 193 SerDes clock vs DIP-switch settings 225 via DIP-switch: set SW6[1:4] = '0100' 229 via DIP-Switch: set SW6[1:4] = '0000'
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| /rk3399_rockchip-uboot/board/freescale/t208xqds/ |
| H A D | README | 176 by DIP-switch: set SW6[1:4] = '0100' 180 by DIP-Switch: set SW6[1:4] = '0000'
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | dra72-evm-common.dtsi | 293 /* To use NAND, DIP switch SW5 must be set like so:
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| H A D | dra7-evm.dts | 247 /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
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| /rk3399_rockchip-uboot/board/gateworks/gw_ventana/ |
| H A D | README | 180 this can simply be the state of a GPIO based pushbutton or DIP switch, for
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