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Searched refs:CRU_CPLL_CON0 (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_cru.c94 rk628_i2c_read(rk628, offset + CRU_CPLL_CON0, &con0); in rk628_cru_clk_get_rate_pll()
161 rk628_i2c_write(rk628, offset + CRU_CPLL_CON0, PLL_BYPASS(1)); in rk628_cru_clk_set_rate_pll()
254 rk628_i2c_write(rk628, offset + CRU_CPLL_CON0, in rk628_cru_clk_set_rate_pll()
577 rk628_i2c_write(rk628, CRU_CPLL_CON0, 0xffff3063); in rk628_cru_init()
585 rk628_i2c_write(rk628, CRU_CPLL_CON0, 0xffff1063); in rk628_cru_init()
H A Drk628_cru.h15 #define CRU_CPLL_CON0 CRU_REG(0x0000) macro