Searched refs:CLK_V1PLL_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance
116 CLK_V1PLL_DIV_SHIFT = 4, enumerator117 CLK_V1PLL_DIV_MASK = 0xf << CLK_V1PLL_DIV_SHIFT,
294 div = (con & CLK_V1PLL_DIV_MASK) >> CLK_V1PLL_DIV_SHIFT; in rk3506_pll_div_get_rate()333 ((div - 1) << CLK_V1PLL_DIV_SHIFT)); in rk3506_pll_div_set_rate()