Searched refs:CLK_V0PLL_DIV_MASK (Results 1 – 2 of 2) sorted by relevance
115 CLK_V0PLL_DIV_MASK = 0xf << CLK_V0PLL_DIV_SHIFT, enumerator
289 div = (con & CLK_V0PLL_DIV_MASK) >> CLK_V0PLL_DIV_SHIFT; in rk3506_pll_div_get_rate()326 rk_clrsetreg(&cru->clksel_con[1], CLK_V0PLL_DIV_MASK, in rk3506_pll_div_set_rate()