Searched refs:CLK_SPI0 (Results 1 – 25 of 30) sorted by relevance
12
87 #define CLK_SPI0 55 macro
98 #define CLK_SPI0 80 macro
111 #define CLK_SPI0 82 macro
135 #define CLK_SPI0 136 macro
49 #define CLK_SPI0 39 macro
211 #define CLK_SPI0 205 macro
32 #define CLK_SPI0 18 macro
244 #define CLK_SPI0 298 macro
104 #define CLK_SPI0 94 macro
401 #define CLK_SPI0 338 macro
171 #define CLK_SPI0 162 macro
166 #define CLK_SPI0 163 macro
432 case CLK_SPI0: in rv1103b_spi_get_clk()467 case CLK_SPI0: in rv1103b_spi_set_clk()850 case CLK_SPI0: in rv1103b_clk_get_rate()936 case CLK_SPI0: in rv1103b_clk_set_rate()
800 case CLK_SPI0: in rk3506_spi_get_rate()850 case CLK_SPI0: in rk3506_spi_set_rate()1076 case CLK_SPI0: in rk3506_clk_get_rate()1152 case CLK_SPI0: in rk3506_clk_set_rate()
566 case CLK_SPI0: in rv1106_spi_get_clk()605 case CLK_SPI0: in rv1106_spi_set_clk()1099 case CLK_SPI0: in rv1106_clk_get_rate()1200 case CLK_SPI0: in rv1106_clk_set_rate()
710 case CLK_SPI0: in rk3528_spi_get_clk()755 case CLK_SPI0: in rk3528_spi_set_clk()1380 case CLK_SPI0: in rk3528_clk_get_rate()1498 case CLK_SPI0: in rk3528_clk_set_rate()
528 case CLK_SPI0: in rv1126b_spi_get_clk()567 case CLK_SPI0: in rv1126b_spi_set_clk()1530 case CLK_SPI0: in rv1126b_clk_get_rate()1662 case CLK_SPI0: in rv1126b_clk_set_rate()
497 case CLK_SPI0: in rk3588_spi_get_clk()542 case CLK_SPI0: in rk3588_spi_set_clk()1613 case CLK_SPI0: in rk3588_clk_get_rate()1766 case CLK_SPI0: in rk3588_clk_set_rate()
535 case CLK_SPI0: in rk3576_spi_get_clk()589 case CLK_SPI0: in rk3576_spi_set_clk()2121 case CLK_SPI0: in rk3576_clk_get_rate()2289 case CLK_SPI0: in rk3576_clk_set_rate()
1092 case CLK_SPI0: in rk3568_spi_get_clk()1134 case CLK_SPI0: in rk3568_spi_set_clk()2575 case CLK_SPI0: in rk3568_clk_get_rate()2761 case CLK_SPI0: in rk3568_clk_set_rate()
419 case CLK_SPI0: in rv1126_pmuclk_get_rate()458 case CLK_SPI0: in rv1126_pmuclk_set_rate()
620 clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
821 clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
475 clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
857 clocks = <&pmucru CLK_SPI0>, <&pmucru PCLK_SPI0>;