Searched refs:CLK_PWM1_SEL_GPLL_DIV (Results 1 – 2 of 2) sorted by relevance
187 CLK_PWM1_SEL_GPLL_DIV = 0, enumerator
740 if (sel == CLK_PWM1_SEL_GPLL_DIV) in rk3506_pwm_get_rate()777 sel = CLK_PWM1_SEL_GPLL_DIV; in rk3506_pwm_set_rate()