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Searched refs:CLK_PWM1_SEL_GPLL_DIV (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3506.h187 CLK_PWM1_SEL_GPLL_DIV = 0, enumerator
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3506.c740 if (sel == CLK_PWM1_SEL_GPLL_DIV) in rk3506_pwm_get_rate()
777 sel = CLK_PWM1_SEL_GPLL_DIV; in rk3506_pwm_set_rate()