Searched refs:CLK_DIV_R0X_VAL (Results 1 – 2 of 2) sorted by relevance
205 #define CLK_DIV_R0X_VAL 0x10 macro
717 writel(CLK_DIV_R0X_VAL, &clk->div_r0x); in exynos5250_system_clock_init()721 writel(CLK_DIV_R0X_VAL, &clk->div_r0x); in exynos5250_system_clock_init()