Searched refs:AR934X_PLL_CPU_DDR_CLK_CTRL_REG (Results 1 – 2 of 2) sorted by relevance
168 setbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()170 setbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()172 setbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()191 pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_pll_init()198 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()200 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()202 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()271 ctrl = readl(regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_update_clock()
353 #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 macro