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Searched refs:AR933X_PLL_CPU_CONFIG_REG (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S187 sw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
190 lw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
211 sw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
216 lw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
H A Dclk.c40 val = readl(regs + AR933X_PLL_CPU_CONFIG_REG); in get_clocks()
/rk3399_rockchip-uboot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h331 #define AR933X_PLL_CPU_CONFIG_REG 0x00 macro