Searched refs:ANA_PLL_CD_TX_SER_RATE_SEL (Results 1 – 1 of 1) sorted by relevance
133 #define ANA_PLL_CD_TX_SER_RATE_SEL BIT(3) macro1160 regmap_update_bits(hdptx->regmap, 0x0204, ANA_PLL_CD_TX_SER_RATE_SEL, in rockchip_hdptx_phy_dp_pll_init()1161 FIELD_PREP(ANA_PLL_CD_TX_SER_RATE_SEL, 0x0)); in rockchip_hdptx_phy_dp_pll_init()