Home
last modified time | relevance | path

Searched refs:smp (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/lib/pm/armv9_0/
H A Dpwr_ctrl.c76 struct mtk_cpu_smp_ops *smp; member
85 #define IS_CPUSMP_FN_ENABLE(x) (imtk_cpu_pwr.smp && (imtk_cpu_pwr.fn_mask & (x)))
183 imtk_cpu_pwr.smp->cpu_on(state); in cpu_pwr_on()
190 imtk_cpu_pwr.smp->cpu_off(state); in cpu_pwr_off()
203 b_ret = imtk_cpu_pwr.smp->cpu_pwr_on_prepare(cpu, entry); in power_domain_on()
400 imtk_cpu_pwr.smp->init(cpu_id, entry_point); in pm_smp_init()
441 imtk_cpu_pwr.smp && in plat_pm_invoke_func()
442 imtk_cpu_pwr.smp->invoke) in plat_pm_invoke_func()
443 ret = imtk_cpu_pwr.smp->invoke(id, priv); in plat_pm_invoke_func()
497 if (!ops || imtk_cpu_pwr.smp) { in register_cpu_smp_ops()
[all …]
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv8_2/
H A Dpwr_ctrl.c64 struct mtk_cpu_smp_ops *smp; member
73 #define IS_CPUSMP_FN_ENABLE(x) ((mtk_cpu_pwr.smp != NULL) && ((mtk_cpu_pwr.fn_mask & x) != 0))
201 mtk_cpu_pwr.smp->cpu_on(state); in armv8_2_cpu_pwr_on()
208 mtk_cpu_pwr.smp->cpu_off(state); in armv8_2_cpu_pwr_off()
221 if (mtk_cpu_pwr.smp->cpu_pwr_on_prepare(cpu, entry) != 0) { in armv8_2_power_domain_on()
426 mtk_cpu_pwr.smp->init(cpu_id, entry_point); in armv8_2_pm_smp_init()
514 if ((ops == NULL) || (mtk_cpu_pwr.smp != NULL)) { in register_cpu_smp_ops()
532 mtk_cpu_pwr.smp = ops; in register_cpu_smp_ops()
/rk3399_ARM-atf/docs/plat/
H A Dqemu.rst88 -initrd rootfs.cpio.gz -smp 2 -m 1024 -bios bl1.bin \
143 -initrd rootfs.cpio.gz -smp 2 -m 1024 -bios flash.bin \
/rk3399_ARM-atf/docs/
H A Dchange-log.md4655 …- cold/warm reset and smp support for Agilex5 SoC FPGA ([79626f4](https://review.trustedfirmware.o…