Home
last modified time | relevance | path

Searched refs:set_mask (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/include/drivers/allwinner/
H A Daxp.h44 int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask);
46 #define axp_setbits(reg, set_mask) axp_clrsetbits(reg, 0, set_mask) argument
/rk3399_ARM-atf/drivers/allwinner/axp/
H A Dcommon.c32 int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask) in axp_clrsetbits() argument
41 val = (ret & ~clr_mask) | set_mask; in axp_clrsetbits()
/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dbl31_setup.c496 unsigned int set_mask = SCR_TBUX_AXCACHE_CONFIG; in brcm_stingray_scr_init() local
501 mmio_clrsetbits_32(scr_base + 0x0, clr_mask, set_mask); in brcm_stingray_scr_init()
506 mmio_clrsetbits_32(scr_base + 0x4, clr_mask, set_mask); in brcm_stingray_scr_init()
511 mmio_clrsetbits_32(scr_base + 0x8, clr_mask, set_mask); in brcm_stingray_scr_init()
516 mmio_clrsetbits_32(scr_base + 0xc, clr_mask, set_mask); in brcm_stingray_scr_init()
521 mmio_clrsetbits_32(scr_base + 0x10, clr_mask, set_mask); in brcm_stingray_scr_init()
/rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/
H A Dncore_ccu.c402 uint32_t set_mask = 0U; in init_ncore_ccu() local
505 set_mask = val & mask; in init_ncore_ccu()
509 mmio_clrsetbits_32((uintptr_t)reg, mask, set_mask); in init_ncore_ccu()
/rk3399_ARM-atf/drivers/st/usb_dwc3/
H A Dusb_dwc3.c528 static void DWC3_regupdateset(void *base, uint32_t offset, uint32_t set_mask) in DWC3_regupdateset() argument
530 mmio_setbits_32((uintptr_t)base + offset, set_mask); in DWC3_regupdateset()