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Searched refs:scr_reg (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/n5x/soc/
H A Dn5x_clock_manager.c20 uint32_t scr_reg; in clk_get_pll_output_hz() local
32 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1); in clk_get_pll_output_hz()
33 clock = mmio_read_32(scr_reg); in clk_get_pll_output_hz()
41 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2); in clk_get_pll_output_hz()
42 clock = mmio_read_32(scr_reg); in clk_get_pll_output_hz()
/rk3399_ARM-atf/plat/intel/soc/stratix10/soc/
H A Ds10_clock_manager.c204 uint32_t scr_reg; in get_ref_clk() local
208 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1); in get_ref_clk()
209 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
215 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2); in get_ref_clk()
216 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c282 uint32_t scr_reg; in get_ref_clk() local
286 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1); in get_ref_clk()
287 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
293 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2); in get_ref_clk()
294 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()