| /rk3399_ARM-atf/drivers/arm/gic/v3/ |
| H A D | gicv3_private.h | 385 unsigned int reg_num) in gicr_read_icenabler() argument
387 return mmio_read_32(base + GICR_ICENABLER + (reg_num << 2)); in gicr_read_icenabler()
390 static inline void gicr_write_icenabler(uintptr_t base, unsigned int reg_num, in gicr_write_icenabler() argument
393 mmio_write_32(base + GICR_ICENABLER + (reg_num << 2), val); in gicr_write_icenabler()
423 static inline unsigned int gicr_read_icfgr(uintptr_t base, unsigned int reg_num) in gicr_read_icfgr() argument
425 return mmio_read_32(base + GICR_ICFGR + (reg_num << 2)); in gicr_read_icfgr()
428 static inline void gicr_write_icfgr(uintptr_t base, unsigned int reg_num, in gicr_write_icfgr() argument
431 mmio_write_32(base + GICR_ICFGR + (reg_num << 2), val); in gicr_write_icfgr()
446 static inline void gicr_write_icpendr(uintptr_t base, unsigned int reg_num, in gicr_write_icpendr() argument
449 mmio_write_32(base + GICR_ICPENDR + (reg_num << 2), val); in gicr_write_icpendr()
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/ |
| H A D | pm_client.c | 181 uint32_t reg_num; in pm_client_set_wakeup_sources() local
201 for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) { in pm_client_set_wakeup_sources()
202 uint32_t base_irq = reg_num << ISENABLER_SHIFT; in pm_client_set_wakeup_sources()
203 uint32_t reg = mmio_read_32(isenabler1 + (uint64_t)(reg_num << 2U)); in pm_client_set_wakeup_sources()
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| /rk3399_ARM-atf/plat/imx/imx8ulp/ |
| H A D | apd_context.c | 130 uint32_t reg_num; member
134 {.offset = IOMUXC_PTD_PCR_BASE, .reg_num = 24},
135 {.offset = IOMUXC_PTE_PCR_BASE, .reg_num = 24},
136 {.offset = IOMUXC_PTF_PCR_BASE, .reg_num = 32},
137 {.offset = IOMUXC_PSMI_BASE0, .reg_num = 10},
138 {.offset = IOMUXC_PSMI_BASE1, .reg_num = 61},
139 {.offset = IOMUXC_PSMI_BASE2, .reg_num = 12},
140 {.offset = IOMUXC_PSMI_BASE3, .reg_num = 20},
141 {.offset = IOMUXC_PSMI_BASE4, .reg_num = 75},
152 for (j = 0; j < iomuxc_sections[i].reg_num; j++) { in apd_io_pad_off()
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| /rk3399_ARM-atf/plat/xilinx/common/pm_service/ |
| H A D | pm_api_sys.c | 55 uint32_t reg_num, device_id; in pm_client_set_wakeup_sources() local
61 for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) { in pm_client_set_wakeup_sources()
62 uint32_t base_irq = reg_num << ISENABLER_SHIFT; in pm_client_set_wakeup_sources()
63 uint32_t reg = mmio_read_32((uint64_t)(isenabler1 + (reg_num << 2))); in pm_client_set_wakeup_sources()
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| /rk3399_ARM-atf/plat/mediatek/drivers/apusys/devapc/ |
| H A D | apusys_dapc_v1.c | 52 void dump_apusys_dapc_v1(const char *name, uintptr_t base, uint32_t reg_num, uint32_t dom_num) in dump_apusys_dapc_v1() argument
61 for (i = 0; i <= reg_num; i++) { in dump_apusys_dapc_v1()
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| H A D | apusys_dapc_v1.h | 112 void dump_apusys_dapc_v1(const char *name, uintptr_t base, uint32_t reg_num, uint32_t dom_num);
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| /rk3399_ARM-atf/plat/mediatek/drivers/cirq/ |
| H A D | mt_cirq.c | 223 cirq_all_events.table[cirq_reg].reg_num = cirq_reg; in collect_all_wakeup_events()
325 mmio_write_32(CIRQ_SENS_CLR_BASE + (reg->reg_num * 4U), in __cirq_fast_clone()
342 cirq_id = (reg->reg_num << 5U) + cirq_bit; in __cirq_fast_clone()
511 (reg->reg_num << 2U)); in cirq_fast_sw_flush()
522 cirq_id = (reg->reg_num << 5U) + cirq_bit; in cirq_fast_sw_flush()
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| H A D | mt_cirq.h | 102 uint32_t reg_num; member
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/apusys/ |
| H A D | mtk_apusys_apc.c | 142 uint32_t reg_num; in dump_apusys_noc_dapc() local
145 reg_num = APUSYS_NOC_DAPC_AO_SLAVE_NUM / in dump_apusys_noc_dapc()
148 for (i = 0U; i <= reg_num; i++) { in dump_apusys_noc_dapc()
430 uint32_t reg_num; in dump_apusys_ao_apc() local
433 reg_num = APUSYS_APC_SYS0_AO_SLAVE_NUM / in dump_apusys_ao_apc()
436 for (i = 0U; i <= reg_num; i++) { in dump_apusys_ao_apc()
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/devapc/ |
| H A D | devapc.c | 2466 int reg_num; in dump_infra_ao_apc() local
2469 reg_num = (SLAVE_NUM_INFRA_AO_SYS0 - 1) / MOD_NO_IN_1_DEVAPC; in dump_infra_ao_apc()
2471 for (i = 0; i <= reg_num; i++) { in dump_infra_ao_apc()
2480 reg_num = (SLAVE_NUM_INFRA_AO_SYS1 - 1) / MOD_NO_IN_1_DEVAPC; in dump_infra_ao_apc()
2482 for (i = 0; i <= reg_num; i++) { in dump_infra_ao_apc()
2491 reg_num = (SLAVE_NUM_INFRA_AO_SYS2 - 1) / MOD_NO_IN_1_DEVAPC; in dump_infra_ao_apc()
2493 for (i = 0; i <= reg_num; i++) { in dump_infra_ao_apc()
2508 int reg_num; in dump_peri_ao_apc() local
2511 reg_num = (SLAVE_NUM_PERI_AO_SYS0 - 1) / MOD_NO_IN_1_DEVAPC; in dump_peri_ao_apc()
2513 for (i = 0; i <= reg_num; i++) { in dump_peri_ao_apc()
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| /rk3399_ARM-atf/drivers/marvell/ |
| H A D | mci.c | 64 #define MCI_INDIRECT_REG_CTRL_ADDR(reg_num) \ argument
65 (reg_num << MCI_INDIRECT_CTRL_REG_CHIPID_OFFSET)
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