Searched refs:ram (Results 1 – 5 of 5) sorted by relevance
66 static const struct board_timing ram[] = {75 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram));
67 static const struct board_timing ram[] = { variable76 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram)); in ddr_board_options()
69 static const struct board_timing ram[] = { variable78 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram)); in ddr_board_options()
110 /* Find out how much free trusted ram remains after BL1 load */
6328 …- set L2 cache data ram latency on A72 cores to 4 cycles ([aee2f33](https://review.trustedfirmware…9269 …- change process that copy code to system ram ([49593cc](https://review.trustedfirmware.org/plugin…10825 - arm/sgi: Bump bl1 RW limit, mark remote chip shared ram as non-cacheable,