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Searched refs:pwrctl (Results 1 – 9 of 9) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp2_ddr.c57 DDRCTL_REG_REG(pwrctl, false),
318 mmio_clrbits_32((uintptr_t)&ctl->pwrctl, in disable_refresh()
326 static void restore_refresh(struct stm32mp_ddrctl *ctl, uint32_t rfshctl3, uint32_t pwrctl) in restore_refresh() argument
336 if ((pwrctl & DDRCTRL_PWRCTL_SELFREF_SW) != 0U) { in restore_refresh()
337 mmio_clrbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_SELFREF_SW); in restore_refresh()
342 if ((pwrctl & DDRCTRL_PWRCTL_POWERDOWN_EN) != 0U) { in restore_refresh()
343 mmio_setbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in restore_refresh()
348 if ((pwrctl & DDRCTRL_PWRCTL_SELFREF_EN) != 0U) { in restore_refresh()
349 mmio_setbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_SELFREF_EN); in restore_refresh()
422 config->c_reg.pwrctl |= DDRCTRL_PWRCTL_SELFREF_SW; in stm32mp2_ddr_init()
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H A Dstm32mp_ddr.c205 mmio_setbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_SELFREF_SW); in stm32mp_ddr_sw_selfref_entry()
207 (uintptr_t)&ctl->pwrctl, in stm32mp_ddr_sw_selfref_entry()
208 mmio_read_32((uintptr_t)&ctl->pwrctl)); in stm32mp_ddr_sw_selfref_entry()
233 mmio_clrbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_SELFREF_SW); in stm32mp_ddr_sw_selfref_exit()
235 (uintptr_t)&ctl->pwrctl, in stm32mp_ddr_sw_selfref_exit()
236 mmio_read_32((uintptr_t)&ctl->pwrctl)); in stm32mp_ddr_sw_selfref_exit()
H A Dstm32mp1_ddr.c65 DDRCTL_REG_REG(pwrctl),
451 mmio_setbits_32((uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
454 (uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
455 mmio_read_32((uintptr_t)&priv->ctl->pwrctl)); in stm32mp1_ddr3_dll_off()
533 mmio_clrbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in stm32mp1_refresh_disable()
540 uint32_t rfshctl3, uint32_t pwrctl) in stm32mp1_refresh_restore() argument
547 if ((pwrctl & DDRCTRL_PWRCTL_POWERDOWN_EN) != 0U) { in stm32mp1_refresh_restore()
548 mmio_setbits_32((uintptr_t)&ctl->pwrctl, in stm32mp1_refresh_restore()
755 config->c_reg.pwrctl); in stm32mp1_ddr_init()
H A Dstm32mp2_ddr_helpers.c435 uint32_t pwrctl = mmio_read_32(stm32mp_ddrctrl_base() + DDRCTRL_PWRCTL); in ddr_read_sr_mode() local
438 switch (pwrctl & (DDRCTRL_PWRCTL_EN_DFI_DRAM_CLK_DISABLE | in ddr_read_sr_mode()
/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/dmc/
H A Ddmc_rk3576.h23 uint32_t pwrctl; member
H A Dsuspend.c86 configs->low_power[ch].pwrctl = mmio_read_32(UMCTL_BASE_CH(ch) + DDRCTL_PWRCTL); in exit_low_power()
165 mmio_write_32(UMCTL_BASE_CH(ch) + DDRCTL_PWRCTL, configs->low_power[ch].pwrctl); in resume_low_power()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp1_ddr.h21 uint32_t pwrctl; member
H A Dstm32mp2_ddr.h24 uint32_t pwrctl; member
H A Dstm32mp_ddrctrl_regs.h28 uint32_t pwrctl; /* 0x30 Low Power Control */ member