Home
last modified time | relevance | path

Searched refs:pwr_state_valid (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/lib/pm/armv8_2/
H A Dpwr_ctrl.c367 if (mtk_cpu_pwr.ops->pwr_state_valid(aff_lvl, pstate) != 0) { in armv8_2_validate_power_state()
393 ret = mtk_cpu_pwr.ops->pwr_state_valid(PLAT_MAX_PWR_LVL, in armv8_2_get_sys_suspend_power_state()
490 pwr_state_valid, success, fns); in register_cpu_pm_ops()
/rk3399_ARM-atf/plat/mediatek/lib/pm/
H A Dmtk_pm.h128 int (*pwr_state_valid)(unsigned int afflv, unsigned int state); member
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv9_0/
H A Dpwr_ctrl.c347 ret = imtk_cpu_pwr.ops->pwr_state_valid(aff_lvl, pstate); in validate_power_state()
473 pwr_state_valid, 1, success, fns); in register_cpu_pm_ops()
/rk3399_ARM-atf/plat/mediatek/include/lib/pm/
H A Dmtk_pm.h209 int (*pwr_state_valid)(unsigned int afflv, unsigned int state); member
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_cpu_pm.c429 .pwr_state_valid = cpupm_pwr_state_valid,
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_cpu_pm.c894 .pwr_state_valid = cpupm_pwr_state_valid,