Home
last modified time | relevance | path

Searched refs:pllm_reg (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c312 uint32_t pllm_reg, pllc_reg, pllc_div, pllglob_reg; in get_clk_freq() local
318 pllm_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLM; in get_clk_freq()
323 pllm_reg = CLKMGR_PERPLL + CLKMGR_PERPLL_PLLM; in get_clk_freq()
332 mdiv = CLKMGR_PLLM_MDIV(mmio_read_32(pllm_reg)); in get_clk_freq()
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c362 uint32_t get_ref_clk(uint32_t pllglob_reg, uint32_t pllm_reg) in get_ref_clk() argument
369 pllm_val = mmio_read_32(pllm_reg); in get_ref_clk()