Searched refs:pllm (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/drivers/ti/clk/include/ |
| H A D | ti_clk_pll.h | 45 uint16_t pllm; member
153 bool (*pllm_valid)(struct ti_clk *clkp, uint32_t pllm, bool is_frac);
167 uint32_t (*pllm_stride)(struct ti_clk *clkp, uint32_t pllm);
187 int32_t (*bin)(struct ti_clk *clkp, uint32_t plld, uint32_t pllm,
206 uint32_t pllm, uint32_t clkod);
224 uint32_t pllm, uint32_t clkod);
268 uint32_t *plld, uint32_t *pllm, uint32_t *pllfm,
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| /rk3399_ARM-atf/drivers/ti/clk/ |
| H A D | ti_clk_pll_16fft.c | 111 static bool ti_pll_16fft_pllm_valid(struct ti_clk *clock_ptr __unused, uint32_t pllm, in ti_pll_16fft_pllm_valid() argument
114 if ((is_frac && (pllm >= 20UL) && (pllm <= 320UL)) || in ti_pll_16fft_pllm_valid()
115 (!is_frac && (pllm >= 16UL) && (pllm <= 640UL))) { in ti_pll_16fft_pllm_valid()
135 uint32_t pllm __unused, bool is_frac, in ti_pll_16fft_bin()
507 uint32_t pllm; in ti_clk_pll_16fft_get_freq_internal() local
519 pllm = (uint32_t)(freq_ctrl0 & PLL_16FFT_FREQ_CTRL0_FB_DIV_INT_MSK); in ti_clk_pll_16fft_get_freq_internal()
520 pllm >>= PLL_16FFT_FREQ_CTRL0_FB_DIV_INT_SHIFT; in ti_clk_pll_16fft_get_freq_internal()
537 ret64 = ((uint64_t) parent_freq_hz / clkod_plld) * pllm; in ti_clk_pll_16fft_get_freq_internal()
538 rem = ((uint64_t) parent_freq_hz % clkod_plld) * pllm; in ti_clk_pll_16fft_get_freq_internal()
576 uint32_t pllm, in ti_clk_pll_16fft_program_freq() argument
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| H A D | ti_pll.c | 53 uint32_t *pllm; member
99 actual64 = ((uint64_t)data->input * entry->pllm) / clkod_plld; in ti_pll_consider_entry()
100 rem64 = ((uint64_t)data->input * entry->pllm) % clkod_plld; in ti_pll_consider_entry()
116 stride = data->data->pllm_stride(data->clk, entry->pllm); in ti_pll_consider_entry()
167 *data->pllm = entry->pllm; in ti_pll_consider_entry()
385 *data->pllm = curr_pllm; in ti_pll_consider()
1130 uint32_t * const plld, uint32_t * const pllm, uint32_t * const pllfm, in ti_pll_calc() argument
1136 assert(pllm != NULL); in ti_pll_calc()
1160 .pllm = pllm, in ti_pll_calc()
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| /rk3399_ARM-atf/plat/ti/k3low/common/pm/ |
| H A D | ti_clocks.c | 168 .pllm = 100U,
176 .pllm = 96U,
184 .pllm = 92U,
192 .pllm = 83U,
200 .pllm = 80U,
208 .pllm = 76U,
216 .pllm = 104U,
224 .pllm = 100U,
232 .pllm = 96U,
240 .pllm = 75U,
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_clock_manager.c | 102 static uint32_t calc_pll_vcocalibration(uint32_t pllm, uint32_t pllglob) in calc_pll_vcocalibration() argument
106 mdiv = pllm & CLKMGR_PLLM_MDIV_MASK; in calc_pll_vcocalibration()
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