| /rk3399_ARM-atf/drivers/ti/clk/include/ |
| H A D | ti_clk.h | 43 { .min_hz = (uint32_t) (min), \
50 { .min_hz = (uint32_t) (min), \
93 uint32_t min_hz; member
103 uint32_t min_hz; member
178 uint32_t min_hz, uint32_t max_hz,
224 uint32_t min_hz, uint32_t max_hz,
261 uint32_t target_hz, uint32_t min_hz,
275 uint32_t ti_clk_set_freq(struct ti_clk *clkp, uint32_t target_hz, uint32_t min_hz,
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| H A D | ti_clk_div.h | 125 uint32_t min_hz, uint32_t max_hz,
150 uint32_t min_hz, uint32_t max_hz,
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| /rk3399_ARM-atf/drivers/ti/clk/ |
| H A D | ti_clk.c | 29 uint32_t min_hz, in ti_clk_value_set_freq() argument
37 if (target_hz < min_hz || target_hz > max_hz) { in ti_clk_value_set_freq()
82 uint32_t target_hz, uint32_t min_hz, in ti_clk_generic_set_freq_parent() argument
113 if (min_hz > max_possible_child_hz) { in ti_clk_generic_set_freq_parent()
118 parent_min_hz = min_hz * div; in ti_clk_generic_set_freq_parent()
153 uint32_t min_hz, in ti_clk_generic_set_freq() argument
170 min_hz, max_hz, in ti_clk_generic_set_freq()
177 if ((freq >= min_hz) && (freq <= max_hz)) { in ti_clk_generic_set_freq()
186 uint32_t min_hz, uint32_t max_hz, in ti_clk_set_freq() argument
199 ret = clkp->drv->set_freq(clkp, target_hz, min_hz, in ti_clk_set_freq()
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| H A D | ti_clk_div.c | 40 uint32_t min_hz, uint32_t max_hz, in ti_clk_div_set_freq_dyn_parent() argument
49 uint32_t updated_min_hz = min_hz; in ti_clk_div_set_freq_dyn_parent()
87 if ((UINT_MAX / divider) < min_hz) { in ti_clk_div_set_freq_dyn_parent()
194 uint32_t min_hz, uint32_t max_hz, in ti_clk_div_set_freq_static_parent() argument
256 if (div1_hz >= min_hz) { in ti_clk_div_set_freq_static_parent()
280 uint32_t min_hz, uint32_t max_hz, in ti_clk_div_set_freq() argument
298 return ti_clk_div_set_freq_dyn_parent(clkp, target_hz, min_hz, in ti_clk_div_set_freq()
302 return ti_clk_div_set_freq_static_parent(clkp, target_hz, min_hz, in ti_clk_div_set_freq()
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| H A D | ti_clk_fixed.c | 28 return range->min_hz; in ti_clk_fixed_get_freq()
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| H A D | ti_clk_pll_16fft.c | 706 uint32_t min_hz, in ti_pll_16fft_set_freq() argument
757 target_hz, min_hz, max_hz, in ti_pll_16fft_set_freq()
796 uint32_t min_hz, in ti_pll_16fft_set_freq_table() argument
906 if (div1_hz >= min_hz) { in ti_pll_16fft_set_freq_table()
952 uint32_t min_hz, in ti_clk_pll_16fft_set_freq() argument
1010 target_hz, min_hz, max_hz, in ti_clk_pll_16fft_set_freq()
1245 uint32_t min_hz, in ti_clk_pll_16fft_postdiv_set_freq() argument
1266 target_hz, min_hz, in ti_clk_pll_16fft_postdiv_set_freq()
1272 return ti_clk_div_set_freq(clock_ptr, target_hz, min_hz, max_hz, in ti_clk_pll_16fft_postdiv_set_freq()
1369 uint32_t min_hz, in ti_clk_pll_16fft_hsdiv_set_freq() argument
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| H A D | ti_pll.c | 747 if (consider_data->vco_in->min_hz != 0U) { in ti_pll_internal_calc()
748 highest_plld = consider_data->input / consider_data->vco_in->min_hz; in ti_pll_internal_calc()
790 } else if (consider_data->vco->min_hz == 0U) { in ti_pll_internal_calc()
794 lowest_clkod = 1U + ((consider_data->vco->min_hz - 1U) / (consider_data->max + 1U)); in ti_pll_internal_calc()
915 consider_data->vco_min = CLAMP((uint64_t)consider_data->vco->min_hz, in ti_pll_internal_calc()
940 vco_target = CLAMP((uint64_t)consider_data->vco->min_hz, in ti_pll_internal_calc()
1227 freq = drv->set_freq(clkp, dflt->target_hz, dflt->min_hz, in ti_pll_init()
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